1. Field of the Invention
The present invention relates to implementing circular buffer addressing mechanisms. In one example, the present invention relates to methods and apparatus for efficiently implementing circular buffer addressing that is particular efficient on programmable chip architectures.
2. Description of Related Art
Various hardware devices such as general purpose processors, cryptography accelerators, video accelerators, digital signal processing (DSP) processors, and microcontrollers can make use of circular buffer addressing. Circular buffer addressing allows rapid access to a variety of data sets. A circular buffer typically has an upper boundary and a lower boundary associated with an address range. A line in the circular buffer is accessed by reading or writing a particular address. The address can then be modified to access another line in the circular buffer.
In many examples, the address is modified by an offset that brings the address out of the address range of the circular buffer. A circular buffer addressing scheme can wrap the address to allow the out of range address to fall within the circular buffer address range. However, mechanisms for implementing circular buffers are limited. In many examples, separate comparators are used to check the upper and lower boundaries against a current address. The implementation can be inefficient in certain device implementations.
Consequently, it is desirable to provide improved techniques and mechanisms for performing circular buffer addressing.